Browsing by Author "Sazeides, Yiannakis"

Now showing items 1-20 of 59

    • Conference Object  

      An analytical framework for estimating TCO and exploring data center design space 

      Hardy, D.; Kleanthous, Marios M.; Sideris, I.; Saidi, A. G.; Ozer, E.; Sazeides, Yiannakis (2013)
      In this paper, we present EETCO: an estimation and exploration tool that provides qualitative assessment of data center design decisions on Total-Cost-of-Ownership (TCO) and environmental impact. It can capture the ...
    • Conference Object  

      An analytical model for the calculation of the Expected Miss Ratio in faulty caches 

      Sánchez, D.; Sazeides, Yiannakis; Aragón, J. L.; García, J. M. (2011)
      Technology scaling improvement is affecting the reliability of ICs due to increases in static and dynamic variations as well as wear-out failures. This is particularly true for caches that dominate the area of modern ...
    • Conference Object  

      Approximating standard cell delay distributions by reformulating the most probable failure point 

      Rodopoulos, Dimitrios; Roussel, P.; Catthoor, F.; Sazeides, Yiannakis; Soudris, Dimitrios J. (CEUR-WS, 2016)
      The delay distribution of a digital circuit path is crucial for the early reliability evaluation of a digital design. As transistors are shrunk to unprecedented dimensions, accurate yet fast estimation of such distributions ...
    • Article  

      BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers 

      Zoni, D.; Canidio, A.; Fornaciari, W.; Englezakis, Panayiotis; Nicopoulos, Chrysostomos A.; Sazeides, Yiannakis (2017)
      The Network-on-Chip (NoC) router buffers play an instrumental role in the performance of both the interconnection fabric and the entire multi-/many-core system. Nevertheless, the buffers also constitute the major leakage ...
    • Conference Object  

      CATCH: A mechanism for dynamically detecting Cache-Content-Duplication and its application to instruction caches 

      Kleanthous, Marios M.; Sazeides, Yiannakis (2008)
      Cache-Content-Duplication (CCD) occurs when there is a miss for a block in a cache and the entire content of the missed block is already in the cache in a block with a different tag. Caches aware of content-duplication can ...
    • Article  

      CATCH: A mechanism for dynamically detecting cache-content-duplication in instruction caches 

      Kleanthous, Marios M.; Sazeides, Yiannakis (2011)
      Cache-content-duplication (CCD) occurs when there is a miss for a block in a cache and the entire content of the missed block is already in the cache in a block with a different tag. Caches aware of content-duplication can ...
    • Conference Object  

      Characterization and analysis of a web search benchmark 

      Hadjilambrou, Zacharias; Kleanthous, Marios M.; Sazeides, Yiannakis (Institute of Electrical and Electronics Engineers Inc., 2015)
      Web search as a service is very impressive. Web search runs on thousands of servers which perform search on an index of billions of web pages. The search results must be both relevant to the user queries and reach the user ...
    • Article  

      Comprehensive Characterization of an Open Source Document Search Engine 

      Hadjilambrou, Zacharias; Kleanthous, Marios; Antoniou, Georgia; Portero, Antoni; Sazeides, Yiannakis (2019)
      This work performs a thorough characterization and analysis of the open source Lucene search library. The article describes in detail the architecture, functionality, and micro-architectural behavior of the search engine, ...
    • Article  

      The Danger of Interval-Based Power Efficiency Metrics: When Worst Is Best 

      Sazeides, Yiannakis; Constantinou, T.; Kumar, R.; Tullsen, D. M. (2005)
      This paper shows that if the execution of a program is divided into distinct intervals, it is possible for one processor or configuration to provide the best power efficiency over every interval, and yet have worse overall ...
    • Article  

      Design tradeoffs for the Alpha EV8 conditional branch predictor 

      Seznec, A.; Felix, S.; Krishnan, V.; Sazeides, Yiannakis (2002)
      This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressive 8-wide issue out-of-order superscalar ...
    • Conference Object  

      Don’t Correct the Tags in a Cache, Just Check Their Hamming Distance from the Lookup Tag 

      Gendler, Alex; Bramnik, Arkady; Szapiro, Ariel; Sazeides, Yiannakis (2018)
      This paper describes the design of an efficient technique for correcting errors in the tag array of set-associative caches. The main idea behind this scheme is that for a cache tag array protected with ECC code, the stored ...
    • Conference Object  

      Eliminating energy of same-content-cell-columns of on-chip SRAM arrays 

      Ahsan, B.; Ndreu, L.; Sideris, I.; Sazeides, Yiannakis; Idgunji, S.; Özer, E. (2011)
      This work proposes to reduce energy by avoiding access to columns of on-chip SRAM arrays whose cell contents are all 1s or all 0s. We refer to this dynamic phenomenon as the Same-Cell-Content-Column (SCC-column). Analysis ...
    • Conference Object  

      An energy-efficient and error-resilient server ecosystem exceeding conservative scaling limits 

      Karakonstantis, Georgios; Tovletoglou, Konstantinos; Mukhanov, Lev; Vandierendonck, Hans; Nikolopoulos, Dimitrios S.; Lawthers, Peter; Koutsovasilis, Panos; Maroudas, Manolis; Antonopoulos, Christos D.; Kalogirou, Christos; Bellas, Nikos; Lalis, Spyros; Venugopal, Srikumar; Prat-Pérez, Arnau; Lampropulos, Alejandro; Kleanthous, Marios; Diavastos, Andreas; Hadjilambrou, Zacharias; Nikolaou, Panagiota; Sazeides, Yiannakis; Trancoso, Pedro; Papadimitriou, George; Kaliorakis, Manolis; Chatzidimitriou, Athanasios; Gizopoulos, Dimitris; Das, Shidhartha (2018)
      The explosive growth of Internet-connected devices will soon result in a flood of generated data, which will increase the demand for network bandwidth as well as compute power to process the generated data. Consequently, ...
    • Conference Object  

      Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core 

      Gabor, Ron; Sazeides, Yiannakis; Bramnik, Arkady; Andreou, Alexandros; Nicopoulos, Chrysostomos; Patsidis, Karyofyllis; Konstantinou, Dimitris; Dimitrakopoulos, Giorgos (2019)
      Emerging mission-critical and functional safety applications require high-performance processors that meet strict reliability requirements against random hardware failures. These requirements touch even sub-systems within ...
    • Conference Object  

      Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core 

      Gabor, Ron; Sazeides, Yiannakis; Bramnik, Arkady; Andreou, Alexandros; Nicopoulos, Chrysostomos; Patsidis, Karyofyllis; Konstantinou, Dimitris; Dimitrakopoulos, Giorgos (2019)
      Emerging mission-critical and functional safety applications require high-performance processors that meet strict reliability requirements against random hardware failures. These requirements touch even sub-systems within ...
    • Book Chapter  

      Evaluating System-Level Monitors and Knobs on Real Hardware 

      Nikolaou, Panagiota; Hadjilambrou, Zacharias; Englezakis, Panayiotis; Ndreu, Lorena; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Portero, Antoni; Vavrik, Radim; Vondrak, Vit (Springer International Publishing, 2019)
      This chapter evaluates and defines a methodology for the oracle selection of the monitors and knobs to use to configure an HPC system running a scientific application while satisfying the application’s requirements and not ...
    • Book Chapter  

      Evaluating System-Level Monitors and Knobs on Real Hardware 

      Nikolaou, Panagiota; Hadjilambrou, Zacharias; Englezakis, Panayiotis; Ndreu, Lorena; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Portero, Antoni; Vavrik, Radim; Vondrak, Vit (Springer International Publishing, 2019)
      This chapter evaluates and defines a methodology for the oracle selection of the monitors and knobs to use to configure an HPC system running a scientific application while satisfying the application’s requirements and not ...
    • Article  

      Extrinsic and intrinsic text cloning 

      Kleanthous, Marios M.; Sazeides, Yiannakis; Dikaiakos, Marios D. (2012)
      Text Cloning occurs when a processor is storing in its shared caches the same text multiple times. There are several causes of Text Cloning and we classify them either as Extrinsic or Intrinsic. Extrinsic Text Cloning can ...
    • Conference Object  

      Fast Estimations of Failure Probability Over Long Time Spans 

      Noltsis, Michail; Englezakis, Panayiotis; Maragkoudaki, Eleni; Nicopoulos, Chrysostomos; Rodopoulos, Dimitrios; Catthoor, Francky; Sazeides, Yiannakis; Zoni, Davide; Soudris, Dimitrios (Association for Computing Machinery, 2018)
      Shrinking of device dimensions has undoubtedly enabled the very large scale integration of transistors on electronic chips. However, it has also brought to surface time-zero and time-dependent variation phenomena that ...
    • Conference Object  

      Fast Estimations of Failure Probability Over Long Time Spans 

      Noltsis, Michail; Englezakis, Panayiotis; Maragkoudaki, Eleni; Nicopoulos, Chrysostomos; Rodopoulos, Dimitrios; Catthoor, Francky; Sazeides, Yiannakis; Zoni, Davide; Soudris, Dimitrios (Association for Computing Machinery, 2018)
      Shrinking of device dimensions has undoubtedly enabled the very large scale integration of transistors on electronic chips. However, it has also brought to surface time-zero and time-dependent variation phenomena that ...